The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2020

Filed:

Oct. 29, 2019
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventor:

Roy McLaren, Gilbert, AZ (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 3/21 (2006.01); H03K 5/01 (2006.01); H03F 1/56 (2006.01); H03F 1/32 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0288 (2013.01); H03F 1/32 (2013.01); H03F 1/565 (2013.01); H03F 3/211 (2013.01); H03K 5/01 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01); H03K 2005/00286 (2013.01);
Abstract

A Doherty power amplifier includes input circuitry that provides input signals to asymmetric carrier and peaking amplifiers (e.g., a peaking-to-carrier size ratio, α is greater than 1.15) with an absolute value of an input phase offset between 15 degrees and 165 degrees or between 195 degrees and 345 degrees. Carrier and peaking amplifier output signals are combined at a combining node. A complex combining load matching circuit, which is connected to the combining node, provides a complex impedance, Z, with a non-zero reactive portion, x. The output circuit between the peaking amplifier and the combining node has an electrical length of 0 or n*180 degrees (n=an integer value). The output circuit between the carrier amplifier and the combining node has an electrical length, θx, where a difference between the electrical lengths of the peaking output circuit and the carrier output circuit is equal to the input phase offset.


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