The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2020

Filed:

Jun. 28, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Khaled Hasnat, San Jose, CA (US);

Prashant Majhi, San Jose, CA (US);

Krishna Parat, Palo Alto, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 23/532 (2006.01); H01L 29/49 (2006.01); H01L 21/768 (2006.01); H01L 29/51 (2006.01); H01L 23/528 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/792 (2006.01); H01L 21/3105 (2006.01); H01L 23/00 (2006.01); H01L 21/3065 (2006.01); H01L 21/3213 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/7682 (2013.01); H01L 23/528 (2013.01); H01L 23/5329 (2013.01); H01L 29/40117 (2019.08); H01L 29/495 (2013.01); H01L 29/4916 (2013.01); H01L 29/513 (2013.01); H01L 29/518 (2013.01); H01L 29/66833 (2013.01); H01L 29/7926 (2013.01); H01L 21/0217 (2013.01); H01L 21/02271 (2013.01); H01L 21/3065 (2013.01); H01L 21/31053 (2013.01); H01L 21/32133 (2013.01); H01L 24/16 (2013.01); H01L 29/66545 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/1438 (2013.01); H01L 2924/14511 (2013.01);
Abstract

Embodiments of the present disclosure are directed towards techniques to provide a memory device with reduced capacitance. In one embodiment, a memory array is formed in a die, and includes one or more pillars and a plurality of wordlines coupled with the one or more pillars. Adjacent wordlines of the plurality of wordlines are separated by respective dielectric layers, which may include components, to reduce capacitance of the plurality of wordlines. The components comprise air gaps or low-k dielectric material. Other embodiments may be described and/or claimed.


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