The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2020

Filed:

Nov. 15, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Matthew D. Rowley, Boise, ID (US);

Dustin J. Carter, Placerville, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G11C 16/30 (2006.01); G06F 1/26 (2006.01); G05F 1/46 (2006.01); G06F 1/28 (2006.01); G01R 19/165 (2006.01); G11C 16/10 (2006.01); H02M 3/158 (2006.01);
U.S. Cl.
CPC ...
G11C 16/30 (2013.01); G01R 19/16552 (2013.01); G05F 1/462 (2013.01); G06F 1/263 (2013.01); G06F 1/28 (2013.01); G11C 5/145 (2013.01); G11C 5/147 (2013.01); G11C 16/10 (2013.01); H02M 3/1582 (2013.01);
Abstract

A memory sub-system includes a power management integrated circuit (PMIC) compatible with operation at an uppermost PMIC supply voltage that is lower than a primary supply voltage of the memory sub-system. The PMIC is configured to output multiple voltages for operation of the memory sub-system based on a PMIC supply voltage. The memory sub-system further includes a capacitive voltage modifier (CVM) coupled to the PMIC. The CVM is configured to receive the primary supply voltage of the memory sub-system as an input and provide a first modified primary supply voltage (MPSV) to the PMIC as the PMIC supply voltage, where the first MPSV is not higher than the uppermost PMIC supply voltage.


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