The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2020

Filed:

Aug. 14, 2019
Applicant:

Microchip Technology Incorporated, Chandler, AZ (US);

Inventors:

Sonu Daryanani, Tempe, AZ (US);

Bomy Chen, Newark, CA (US);

Matthew Martin, Gilbert, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 7/00 (2006.01); G11C 16/04 (2006.01); H01L 29/423 (2006.01); G11C 16/08 (2006.01); G11C 16/34 (2006.01); G11C 16/14 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/0408 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); G11C 16/3418 (2013.01); H01L 29/42328 (2013.01);
Abstract

A memory cell having a structure of a modified flash memory cell, but configured to operate in a low voltage domain (e.g., using voltages of ≤6V amplitude for program and/or erase operations) is provided. The disclosed memory cells may be formed with dielectric layers having reduced thickness(es) as compared with conventional flash memory cells, which allows for such low voltage operation. The disclosed memory cells may be compatible with advanced, high density, low energy data computational applications. The disclosed memory cells may replace or reduce the need for RAM (e.g., SRAM or DRAM) in a conventional device, e.g., microcontroller or computer, and are thus referred to 'RAM Flash' memory cells. Data retention of RAM Flash memory cells may be increased (e.g., to days, months, or years) by (a) applying a static holding voltage at selected nodes of the cell, and/or (b) periodically refreshing data stored in RAM Flash.


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