The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

May. 14, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chan-Hong Chern, Palo Alto, CA (US);

Tsung-Ching Huang, Mountain View, CA (US);

Chih-Chang Lin, San Jose, CA (US);

Ming-Chieh Huang, San Jose, CA (US);

Fu-Lung Hsueh, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/13 (2014.01); H03K 17/687 (2006.01); H03K 19/0185 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018507 (2013.01); H03K 5/13 (2013.01); H03K 17/687 (2013.01); H03K 19/018521 (2013.01); H03K 2005/00013 (2013.01); H03K 2005/00019 (2013.01);
Abstract

A circuit receives an input signal that switches between reference and first voltage levels, a power node carries a second voltage level, and a set of transistors is coupled between the power node and an output node. The second voltage level is a multiple of the first voltage level, and the multiple and a number of the transistors have a same value greater than two. A control signal circuit includes a level shifting circuit including a series of capacitive devices paired with latch circuits, a number of the pairs being one less than the value of the multiple, and, responsive to the input signal, outputs a control signal to a gate of a transistor of the first set of transistors closest to the power node, the control signal switching between the second voltage level and a third voltage level equal to the second voltage level minus the first voltage level.


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