The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Apr. 23, 2019
Applicant:

Socionext Inc., Yokohama, JP;

Inventors:

Seiji Goto, Yokohama, JP;

Eiichi Nimoda, Yokohama, JP;

Satoru Okamoto, Yokohama, JP;

Assignee:

SOCIONEXT INC., Yokohama, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01); G06F 13/42 (2006.01); G06F 13/38 (2006.01);
U.S. Cl.
CPC ...
G06F 13/36 (2013.01); G06F 13/38 (2013.01); G06F 13/42 (2013.01);
Abstract

Processing by an information processing system is speeded up. A first semiconductor integrated circuit designates a first address of a memory connected to a second semiconductor integrated circuit that is a data transmission destination, based on first memory map information in which addresses of memories respectively used by the semiconductor integrated circuits are defined, converts the first address to a second address of the memory defined in second memory map information referred to by the data transmission destination, and outputs the second address and transmission data by using a PCIe interface. A switch transfers the second address and the transmission data to the data transmission destination by using PCIe interfaces. The data transmission destination receives the second address and the transmission data by using a PCIe interface and writes the transmission data into the reception buffer region of the memory corresponding to the second address.


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