The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Dec. 21, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Vineeth Mekkat, San Jose, CA (US);

Mark Dechene, Hillsboro, OR (US);

Zhongying Zhang, Portland, OR (US);

John Faistl, Hillsboro, OR (US);

Janghaeng Lee, San Jose, CA (US);

Hou-Jen Ko, Sunnyvale, CA (US);

Sebastian Winkel, Los Altos, CA (US);

Oleg Margulis, Los Gatos, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/312 (2018.01); G06F 9/40 (2006.01); G06F 9/44 (2018.01); G06F 9/38 (2018.01); G06F 9/30 (2018.01); G06F 8/41 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3838 (2013.01); G06F 9/30043 (2013.01); G06F 9/30065 (2013.01); G06F 8/433 (2013.01); G06F 8/443 (2013.01); G06F 9/3836 (2013.01);
Abstract

A processor includes a store buffer to store store instructions to be processed to store data in main memory, a load buffer to store load instructions to be processed to load data from main memory, and a loop invariant code motion (LICM) protection structure coupled to the store buffer and the load buffer. The LPT tracks information to compare an address of a store or snoop microoperation with entries in the LICM and re-loads a load microoperation of a matching entry.


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