The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2020

Filed:

Mar. 04, 2019
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Qinxiang Wei, Wuhan, CN;

Jianhua Sun, Wuhan, CN;

Ji Xia, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01); H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); H01L 27/11573 (2017.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 27/1157 (2013.01); H01L 27/11573 (2013.01); H01L 29/40117 (2019.08);
Abstract

Embodiments of three-dimensional (3D) memory devices having through stair contacts (TSCs) and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A dielectric stack including a plurality of interleaved dielectric layers and sacrificial layers is formed on a substrate. A staircase structure is formed on one side of the dielectric stack. A dummy hole extending vertically through the staircase structure and reaching the substrate is formed. A spacer having a hollow core is formed in the dummy hole. A TSC in contact with the substrate is formed by depositing a conductor layer in the hollow core of the spacer. The TSC extends vertically through the staircase structure.


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