The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2020

Filed:

Oct. 02, 2019
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

Yi-Chung Chen, Taichung, TW;

Cheng-Jen Lai, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/461 (2006.01); H01L 27/11521 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11521 (2013.01);
Abstract

A method for manufacturing a non-volatile memory device is provided. The method includes the following steps. A plurality of isolation structures are formed in a substrate, and a depression region is formed between two adjacent isolation structures. A conductive layer and a sacrificial layer are conformally formed on the isolation structures and the substrate. The sacrificial layer in the depression region defines a recess part. A first CMP process is performed to partially remove the sacrificial layer and to expose the conductive layer on the isolation structures. A second CMP process is performed to partially remove conductive layer, and to expose top surfaces of the isolation structures. A third CMP process is performed to remove the sacrificial layer completely. A top surface of the conductive layer is level with a top surface of the isolation structure after the third CMP process.


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