The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2020
Filed:
Oct. 02, 2017
Agile Power Switch 3d-integration Apsi3d, Tarbes, FR;
Irt Saint Exupery (Aese), Toulouse, FR;
Ecole Nationale D'ingenieurs DE Tarbes, Tarbes, FR;
Jacques Pierre Henri Favre, Toulouse, FR;
Jean-Michel Francis Reynes, Gaillac, FR;
Raphaël Riva, Ger, FR;
Paul-Etienne Joseph Vidal, Tarbes, FR;
Baptiste Louis Jean Trajin, Auzas, FR;
AGILE POWER SWITCH 3D-INTEGRATION APSI3D, Tarbes, FR;
IRT SAINT EXUPERY (AESE), Toulouse, FR;
ECOLE NATIONALE D'INGENIEURS DE TARBES, Tarbes, FR;
Abstract
Some embodiments are directed to a method of determining a sintering thermal impedance of a sintering layer by: providing a substrate having a predetermined substrate thermal impedance and disposing the sintering layer on the substrate forming with the sintering layer a stack. Placing at least one semiconductor die, that includes a semiconductor element with at least two element electrodes on the sintering layer. Injecting an electrical current through the at least two element electrodes for measuring a temperature sensitive parameter of the semiconductor element. Heating the stack with a predetermined heat power and determining, while sintering, a semiconductor element temperature from the measured temperature sensitive parameter. Measuring a stack temperature and determining a stack thermal impedance by subtracting the semiconductor element temperature from the stack temperature and dividing by the predetermined heat power, and subtracting the predetermined substrate thermal impedance from the stack thermal impedance.