The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2020

Filed:

May. 15, 2018
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Dong Wang, Shanghai, CN;

Xiao Yan Bao, Shanghai, CN;

Tian Hua Dong, Shanghai, CN;

Guang Ning Li, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/3215 (2006.01); H01L 21/8234 (2006.01); H01L 21/225 (2006.01); H01L 29/08 (2006.01); H01L 29/66 (2006.01); H01L 29/36 (2006.01); H01L 29/45 (2006.01); G06F 21/72 (2013.01); H04L 9/32 (2006.01); H04L 9/08 (2006.01); H01L 29/417 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 23/576 (2013.01); G06F 21/72 (2013.01); H01L 21/2257 (2013.01); H01L 21/32155 (2013.01); H01L 21/823418 (2013.01); H01L 21/823475 (2013.01); H01L 27/088 (2013.01); H01L 29/0847 (2013.01); H01L 29/36 (2013.01); H01L 29/41725 (2013.01); H01L 29/456 (2013.01); H01L 29/6656 (2013.01); H01L 29/66575 (2013.01); H04L 9/0866 (2013.01); H04L 9/3278 (2013.01); G06F 2221/2107 (2013.01);
Abstract

The present application relates to a technical field of semiconductors, and discloses a device having a physically unclonable function, a method for manufacturing same, and a chip using same. The may method include: providing a substrate structure that comprises: a substrate comprising encryption device areas and reference device areas; at least one first gate structure on the encryption device areas and used in an encryption device and a first spacer layer on a side wall of the first gate structure; a first interconnection layer on the encryption device areas and the first spacer layer; at least one second gate structure on the reference device areas and used in a reference device and a second spacer layer on a side wall of the second gate structure; and a second interconnection layer on the reference device area and the second spacer layer; performing first ion injection, so as to introduce first impurities into the first interconnection layer; performing second ion injection, so as to introduce second impurities into the first and second interconnection layers, where a password of the device having a physically unclonable function is determined according to a drain current of each encryption device and a drain current of a reference device corresponding to the encryption device.


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