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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10847469 B1

PDFFull Text
Date of Patent:
Nov. 24, 2020

Filed:

Jul. 17, 2017

Cte compensation for wafer-level and chip-scale packages and assemblies

Applicant:

Nuvotronics, Inc., Radford, VA (US);

Inventors:

Kenneth J. Vanhille, Cary, NC (US);

Aaron C. Caba, Blacksburg, VA (US);

Masud Beroz, Apex, NC (US);

Jared W. Jordan, Raleigh, NC (US);

Timothy A. Smith, Durham, NC (US);

Anatoliy O. Boryssenko, Belchertown, MA (US);

Steven E. Huettner, Tucson, AZ (US);

Assignee:

CUBIC CORPORATION, San Diego, CA (US);

Attorneys:

Niels Haun

Dann, Dorfman, Herrell & Skillman

Primary Examiner:

Ida M Soward

Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/538 (2006.01); H01L 23/13 (2006.01); H01L 23/52 (2006.01); H01L 21/68 (2006.01); H01L 21/78 (2006.01); H01L 23/528 (2006.01); H01L 23/00 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5386 (2013.01); H01L 21/6836 (2013.01); H01L 21/78 (2013.01); H01L 23/13 (2013.01); H01L 23/528 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 24/96 (2013.01); H01L 21/561 (2013.01); H01L 23/3114 (2013.01); H01L 23/562 (2013.01); H01L 24/09 (2013.01); H01L 24/13 (2013.01); H01L 24/17 (2013.01); H01L 24/49 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68345 (2013.01); H01L 2224/02319 (2013.01); H01L 2224/02377 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/03002 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/4813 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48105 (2013.01); H01L 2224/49431 (2013.01); H01L 2224/73207 (2013.01); H01L 2224/85005 (2013.01); H01L 2224/96 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/15184 (2013.01); H01L 2924/15311 (2013.01);
Abstract

A microelectronic structure having CTE compensation for use in wafer-level and chip-scale packages, comprising a plurality of substrate tiles each having a generally planar upper surface, the upper surfaces of the tiles disposed within a common plane to provide a generally planar grid of the tiles, each respective pair of adjacent tiles having a gap disposed therebetween.

Find Patent Forward Citations

Vanhille, Kenneth. (2020). Cte compensation for wafer-level and chip-scale packages and assemblies (U.S. Patent No. 10847469). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10847469

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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