The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2020

Filed:

Feb. 26, 2019
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Aditya Kesiraju, Los Gatos, CA (US);

Andrew J. Beaumont-Smith, Cambridge, MA (US);

Deepankar Duggal, Sunnyvale, CA (US);

Ran A. Chachick, Providence, RI (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/345 (2018.01); G06F 9/38 (2018.01); G06F 9/30 (2018.01); G06F 12/0802 (2016.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 9/345 (2013.01); G06F 9/3001 (2013.01); G06F 9/30043 (2013.01); G06F 9/3824 (2013.01); G06F 9/3838 (2013.01); G06F 9/3877 (2013.01); G06F 9/4881 (2013.01); G06F 12/0802 (2013.01);
Abstract

In an embodiment, a coprocessor includes multiple processing elements arranged in a grid of one or more rows and one or more columns. A given processing element includes an arithmetic/logic unit (ALU) circuit configured to perform an ALU operation specified by an instruction executable by the coprocessor, wherein the ALU circuit is configured to produce a result. The given processing element further comprises a first memory coupled to the execute circuit. The first memory is configured to store results generated by the given processing element. The first memory includes a portion of a result memory implemented by the coprocessor, wherein locations in the result memory are specifiable as destination operands of instructions executable by the coprocessor. The portion of the result memory implemented by the first memory is the portion of the result memory that the given processing element is capable of updating.


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