The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2020
Filed:
Feb. 15, 2019
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Bradley Andrew Glasscock, Wylie, TX (US);
Michael Todd Wyant, Dallas, TX (US);
Christopher Daniel Manack, Flower Mound, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 23/495 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 23/49589 (2013.01); H01L 24/06 (2013.01); H01L 24/09 (2013.01); H01L 23/3114 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/1626 (2013.01); H01L 2224/16151 (2013.01); H01L 2224/16265 (2013.01); H01L 2924/19103 (2013.01);
Abstract
A packaged semiconductor device includes at least one semiconductor die having circuitry with circuit nodes coupled to bond pads that have bonding features thereon. A plurality of leads or lead terminals include at least metal bars, wherein the plurality of leads or lead terminals are exclusive of any saw marks. The semiconductor die is flipchip attached with a bonded connection between respective bonding features and respective leads or lead terminals.