The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2020

Filed:

Dec. 29, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Carey W. Smith, Hillsboro, OR (US);

Julian J. Revuelta, Gilbert, AZ (US);

Mihai D. Mihalache, Feldkirchen, DE;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/26 (2006.01); G06F 11/263 (2006.01); G06F 11/22 (2006.01);
U.S. Cl.
CPC ...
G06F 11/263 (2013.01); G06F 11/2242 (2013.01); G06F 11/26 (2013.01);
Abstract

Methods and apparatus relating to characterizing proximity risks within a radio mesh are described. In an embodiment, test manager logic causes periodic testing of one of a first group of processor cores or a second group of processor cores. Each of the first group of processor cores or the second group of processor cores comprises one or more processor cores of a multi-core processor. Memory stores information corresponding to the period testing of the first group of processor cores and the second group of processor cores. A fault signal is to be generated in response to completion of the period testing outside a Fault Tolerant Time Interval (FTTI). Other embodiments are also disclosed and claimed.


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