The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 2020
Filed:
Sep. 30, 2016
Intel Corporation, Santa Clara, CA (US);
Nabil G. Mistkawi, North Keizer, OR (US);
Glenn A. Glass, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An integrated circuit device with a substrate and a plurality of fins is provided where the fin width is less than 11 nanometers, the fin height is greater than 155 nanometers and the spacing between any two neighboring fins is less than 30 nanometers and each of the fins is in a non-collapsed state. An integrated circuit device with a substrate and a plurality of fins is also provided where the fin width is less than 15 nanometers, the fin height is greater than 190 nanometers and the spacing between any two neighboring fins is less than 30 nanometers and each of the fins is in a non-collapsed state. A method for forming a fin-based transistor structure is also provided where a plurality of fins on a substrate are pre-treated with at least one of a self-assembled monolayer, a non-polar solvent, and a surfactant. One or more of these treatments is provided to reduce the adhesion and/or cohesive forces to prevent the occurrence of fin collapse.