The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2020

Filed:

Apr. 16, 2019
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventor:

Ming-Chung Chiang, Changhua County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/525 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5256 (2013.01); H01L 21/31116 (2013.01); H01L 21/76832 (2013.01); H01L 23/5226 (2013.01); H01L 23/53295 (2013.01);
Abstract

A method for manufacturing a semiconductor device is provided. The method includes providing a substrate having a first region and a second region. The method also includes forming an interconnection structure on the first region and a fuse structure on the second region. The method further includes forming a first conductive pad on the interconnection structure. In addition, the method includes forming a capping layer, an etching stop layer and a dielectric layer to cover the first conductive pad and the fuse structure. The method further includes performing an etching process so that a first opening is formed to expose the conductive pad and a second opening is formed directly above the fuse structure. During the etching process, the first dielectric layer has a first etching rate, and the etching stop layer has a second etching rate that is lower than the first etching rate.


Find Patent Forward Citations

Loading…