The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2020
Filed:
Oct. 05, 2016
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Jun Liu, San Jose, CA (US);
Hao Yu, Longmont, CO (US);
Raymond Kong, San Jose, CA (US);
David P. Schultz, Longmont, CO (US);
Assignee:
XILINX, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 30/394 (2020.01); G06F 30/34 (2020.01); G06F 30/327 (2020.01); G06F 30/392 (2020.01); G06F 30/347 (2020.01);
U.S. Cl.
CPC ...
G06F 30/394 (2020.01); G06F 30/327 (2020.01); G06F 30/34 (2020.01); G06F 30/347 (2020.01); G06F 30/392 (2020.01);
Abstract
Method, apparatus and computer-readable medium for providing a partial reconfiguration of a reconfigurable module are described. In one example, a method reads a netlist for a design of a circuit comprising a reconfigurable module and sets the reconfigurable module to a first region. The method then generates a second region that encompasses the first region and places the design with the first region. The method routes the design with the second region and generates a partial bitstream for the reconfigurable module.