The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2020

Filed:

Dec. 29, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Prashant Chaudhari, Folsom, CA (US);

Michael Derr, El Dorado Hills, CA (US);

Gustavo Espinosa, Portland, OR (US);

Balaji Vembu, Folsom, CA (US);

Richard Shannon, Portland, OR (US);

Bradley Coffman, Hillsboro, OR (US);

Daniel Knollmueller, Phoenix, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/22 (2006.01); G06F 11/263 (2006.01);
U.S. Cl.
CPC ...
G06F 11/263 (2013.01); G06F 11/2205 (2013.01); G06F 11/2215 (2013.01); G06F 11/2284 (2013.01);
Abstract

Systems, apparatuses and methods may provide for technology that detects a startup of a system on chip (SoC) and injects, during the startup, one or more domain startup errors into a plurality of domains on the SoC. Additionally, the technology may determine whether the domain startup error(s) were detected during the startup. In one example, the plurality of domains include one or more fabric interfaces.


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