The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2020

Filed:

Apr. 17, 2017
Applicant:

Unimicron Technology Corp., Taoyuan, TW;

Inventor:

Chun-Ting Lin, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/40 (2006.01); H05K 3/46 (2006.01); H01L 21/67 (2006.01); H01L 21/673 (2006.01); H01L 21/677 (2006.01); H05K 1/11 (2006.01); H05K 3/06 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H05K 3/40 (2013.01); H01L 21/673 (2013.01); H01L 21/6779 (2013.01); H01L 21/67265 (2013.01); H01L 21/67346 (2013.01); H01L 21/67763 (2013.01); H05K 1/11 (2013.01); H05K 3/4007 (2013.01); H05K 3/4682 (2013.01); H01L 24/16 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/0132 (2013.01); H01L 2924/0133 (2013.01); H01L 2924/12042 (2013.01); H05K 3/06 (2013.01); H05K 2201/0367 (2013.01); H05K 2201/0979 (2013.01); H05K 2203/0369 (2013.01); H05K 2203/0376 (2013.01);
Abstract

A carrier substrate includes a circuit structure layer, a first solder resist layer, a second solder resist layer and conductive towers. The circuit structure layer includes a core structure layer, a first circuit layer and a second circuit layer. The first solder resist layer has first openings exposing a portion of the first circuit layer. The second solder resist layer has second openings exposing a portion of the second circuit layer. The conductive towers are disposed at the first openings, higher than a surface of the first solder resist layer and connected with the first openings exposed by the first circuit layer, wherein a diameter of each of the conductive towers gradually increases by a direction from away-from the first openings towards close-to the first openings. A diameter of the second conductive towers is greater than that of the first conductive towers.


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