The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2020

Filed:

May. 17, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Gianfranco Valeri, Pescina, IT;

Violante Moschiano, Avezzano, IT;

Walter Di-Francesco, Silvi, IT;

Assignee:

Micron Technolgy, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); G11C 16/28 (2006.01); G06F 11/10 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/28 (2013.01); G06F 11/1008 (2013.01); G11C 13/004 (2013.01); G11C 16/107 (2013.01);
Abstract

Methods of operating a memory, and apparatus configured to perform similar methods, include determining first states of a first sense node and a second sense node while a first voltage level is capacitively coupled to the first sense node and while a second voltage level is capacitively coupled to the second sense node, determining a second states of the first and second sense nodes while a third voltage level is capacitively coupled to the first sense node and while a fourth voltage level is capacitively coupled to the second sense node, determining a fifth voltage level in response to at least the first states of the first and second sense nodes and the second states of the first and second sense nodes, and determining third states of the first and second sense nodes while the fifth voltage level is capacitively coupled to the first and second sense nodes.


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