The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2020

Filed:

Feb. 19, 2019
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

Bo-Lun Wu, Taichung, TW;

Chang-Tsung Pai, Taichung, TW;

Ming-Che Lin, Taichung, TW;

Meng-Hung Lin, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); G11C 11/56 (2006.01); H01L 27/24 (2006.01); G11C 13/00 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 45/1233 (2013.01); G11C 11/5685 (2013.01); H01L 27/2463 (2013.01); H01L 45/08 (2013.01); H01L 45/1253 (2013.01); H01L 45/1608 (2013.01); H01L 45/1675 (2013.01); G11C 13/0007 (2013.01); G11C 2213/31 (2013.01); G11C 2213/32 (2013.01); G11C 2213/52 (2013.01); H01L 23/535 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01);
Abstract

A resistive random access memory (RRAM) is provided. The RRAM includes a lower electrode, an upper electrode, a first variable resistance layer and a second variable resistance layer. The lower electrode is disposed on a substrate, and is a single electrode or a pair of electrodes electrically connected to each other. The upper electrode is disposed on the lower electrode, and overlaps the lower electrode. The first variable resistance layer and the second variable resistance layer are disposed on the substrate. At least a portion of the first variable resistance layer is disposed between the lower electrode and the upper electrode, and at least a portion of the second variable resistance layer is disposed between the lower electrode and the upper electrode and connected to the first variable resistance layer.


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