The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2020

Filed:

Aug. 16, 2019
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

Chi-Shun Lin, San Jose, CA (US);

Chuen-Der Lien, San Jose, CA (US);

Douk-Hyoun Ryu, San Jose, CA (US);

Ming-Huei Shieh, San Jose, CA (US);

Seow Fong Lim, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0026 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); G11C 2013/005 (2013.01); G11C 2213/75 (2013.01); G11C 2213/79 (2013.01);
Abstract

The disclosure is directed to a RRAM having a plurality of 1TnR structures. In an aspect, the disclosure provides a RRAM including a plurality of 1TnR structures which includes a first 1TnR structure which includes a first transistor having a first gate terminal connected to a first word line, a first drain terminal, and a first source terminal connected to a source line, wherein the source line is connected to each of the plurality of 1TnR structures; and a first N parallel resistors group including a first resistor and a second resistor which are connected to the first drain terminal and connected to each other in parallel, wherein the first resistor is connected to a first bit line, the second resistor is connected to a second bit line, and N is an integer greater than one.


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