The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2020

Filed:

Jun. 06, 2018
Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Yoshihisa Kagawa, Kanagawa, JP;

Nobutoshi Fujii, Kanagawa, JP;

Masanaga Fukasawa, Tokyo, JP;

Tokihisa Kaneguchi, Kanagawa, JP;

Yoshiya Hagimoto, Kanagawa, JP;

Kenichi Aoyagi, Kanagawa, JP;

Ikue Mitsuhashi, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14636 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 24/08 (2013.01); H01L 25/065 (2013.01); H01L 27/1464 (2013.01); H01L 27/1469 (2013.01); H01L 27/14632 (2013.01); H01L 27/14634 (2013.01); H01L 27/14687 (2013.01); H01L 24/05 (2013.01); H01L 24/80 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/08121 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2224/9202 (2013.01);
Abstract

The present technology relates to a semiconductor device and a solid-state imaging device of which crack resistance can be improved in a simpler way. The semiconductor device has an upper substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and a second substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and is joined to the upper substrate. In addition, a pad for wire bonding or probing is formed in the upper substrate, and pads for protecting corner or side parts of the pad for wire bonding or probing are radially laminated and provided in each of the wiring layers between the pad and the Si substrate of the lower substrate. The present technology can be applied to a solid-state imaging device.


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