The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2020

Filed:

Feb. 19, 2020
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Dae Sub Jung, Shanghai, CN;

De Yan Chen, Shanghai, CN;

Guang Li Yang, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/04 (2006.01); H01L 29/06 (2006.01); H01L 21/3115 (2006.01); H01L 21/28 (2006.01); H01L 21/74 (2006.01); H01L 21/266 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0465 (2013.01); H01L 21/0455 (2013.01); H01L 21/266 (2013.01); H01L 21/2822 (2013.01); H01L 21/31155 (2013.01); H01L 21/74 (2013.01); H01L 29/0623 (2013.01);
Abstract

A semiconductor device and its manufacturing method, relating to semiconductor techniques. The semiconductor device manufacturing method comprises: forming a patterned first hard mask layer on a substrate to define a position for buried layers; conducting a first ion implantation using the first hard mask layer as a mask to form a first buried layer and a second buried layer both having a first conductive type and separated from each other at two sides of the first hard mask layer in the substrate; conducting a second ion implantation to form a separation region with a second conductive type opposite to the first conductive type in the substrate between the first and the second buried layers; removing the first hard mask layer; and forming a semiconductor layer on the substrate. This inventive concept reduces an area budget of a substrate and simplifies the manufacturing process.


Find Patent Forward Citations

Loading…