The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2020

Filed:

Jun. 24, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Izajasz Piotr Wrosz, Banino, PL;

Tomasz Janczak, Gdansk, PL;

Prasoonkumar Surti, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 15/04 (2011.01); G06T 15/80 (2011.01); G06T 1/20 (2006.01); G06T 1/60 (2006.01); G06T 15/06 (2011.01); G06T 11/00 (2006.01); G06T 15/00 (2011.01);
U.S. Cl.
CPC ...
G06T 1/20 (2013.01); G06T 1/60 (2013.01); G06T 11/001 (2013.01); G06T 15/005 (2013.01); G06T 15/04 (2013.01); G06T 15/06 (2013.01); G06T 15/80 (2013.01); G06T 2200/28 (2013.01);
Abstract

Systems and methods for avoiding additional processing during generation of a procedural texture are disclosed. In one embodiment, a graphics processor includes memory to store graphics data and control data of a procedural texture. A texel shader dispatch circuitry is coupled to the memory. The texel shader dispatch circuitry is configured to maintain coherency between local memory of the texel shader dispatch circuitry during generation of the procedural texture via communication with the procedural texture to avoid overshading.


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