The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Dec. 07, 2018
Applicants:

Shinko Electric Industries Co., Ltd., Nagano, JP;

Nihon Kohden Corporation, Tokyo, JP;

Inventors:

Tatsuaki Denda, Nagano, JP;

Norihito Konno, Tokyo, JP;

Minori Hosoi, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/00 (2006.01); H05K 1/11 (2006.01); H05K 1/02 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0216 (2013.01); H05K 1/0218 (2013.01); H05K 1/113 (2013.01); H05K 1/0257 (2013.01); H05K 1/181 (2013.01); H05K 2201/0723 (2013.01); H05K 2201/09672 (2013.01); H05K 2201/10022 (2013.01); H05K 2201/10545 (2013.01);
Abstract

A protection circuit module includes an insulating substrate, a first surge withstand chip resistor mounted on a pair of first pads formed on one surface of the insulating substrate, a second surge withstand chip resistor mounted on a pair of second pads formed on the other surface of the insulating substrate, and arranged at a position on the other surface of the insulating substrate overlapping the first surge withstand chip resistor in a plan view, a first wiring coupled to one first pad, a second wiring coupled to one second pad, a third wiring coupling the other first pad and the other second pad to the same potential, and a shield wiring provided on an inner layer of the insulating substrate and arranged in a region in which at least the one first pad and the one second pad oppose each other.


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