The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Oct. 22, 2018
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Chih-Nan Wu, Hsin-Chu, TW;

Shiu-Ko JangJian, Hsin-Chu, TW;

Chun Che Lin, Hsin-Chu, TW;

Wen-Cheng Hsuku, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/28 (2006.01); H01L 21/285 (2006.01); H01L 29/66 (2006.01); H01L 21/3213 (2006.01); H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 23/485 (2006.01); H01L 21/768 (2006.01); H01L 29/51 (2006.01); H01L 29/417 (2006.01); H01L 21/321 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7851 (2013.01); H01L 21/28088 (2013.01); H01L 21/28556 (2013.01); H01L 21/3212 (2013.01); H01L 21/3213 (2013.01); H01L 21/7684 (2013.01); H01L 21/76802 (2013.01); H01L 21/76831 (2013.01); H01L 21/76843 (2013.01); H01L 21/76844 (2013.01); H01L 21/76877 (2013.01); H01L 21/76879 (2013.01); H01L 23/485 (2013.01); H01L 29/41791 (2013.01); H01L 29/42372 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/78 (2013.01); H01L 29/785 (2013.01); H01L 23/53223 (2013.01); H01L 23/53266 (2013.01); H01L 29/513 (2013.01);
Abstract

An improved conductive feature for a semiconductor device and a technique for forming the feature are provided. In an exemplary embodiment, the semiconductor device includes a substrate having a gate structure formed thereupon. The gate structure includes a gate dielectric layer disposed on the substrate, a growth control material disposed on a side surface of the gate structure, and a gate electrode fill material disposed on the growth control material. The gate electrode fill material is also disposed on a bottom surface of the gate structure that is free of the growth control material. In some such embodiments, the gate electrode fill material contacts a first surface and a second surface that are different in composition.


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