The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Jul. 10, 2018
Applicants:

Macronix International Co., Ltd., Hsinchu, TW;

Megachips Corporation, Osaka-shi, JP;

Inventors:

Yuchih Yeh, Hsin-Chu, TW;

Naping Kuo, Hsin-chu, TW;

Yuko Tamagawa, Osaka, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 12/10 (2016.01); G06F 11/10 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G06F 11/142 (2013.01); G06F 11/1068 (2013.01); G06F 12/10 (2013.01); G11C 29/52 (2013.01); G06F 2201/82 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/7201 (2013.01);
Abstract

Methods, systems and apparatus including computer-readable mediums for rearranging data for refresh operations in memory systems such as NAND flash memory devices are provided. In one aspect, a method includes: determining that a particular logical page in a logical block fails based on error bits in a particular physical page that is in a first physical block mapped with the logical block and corresponds to the particular logical page, logical pages in the logical block being mapped to physical pages in the first physical block with an initial mapping order, and executing a refresh operation on the first physical block with a rearranged mapping order for the logical block, the rearranged mapping order being different from the initial mapping order. For the refresh operation, the logical pages in the logical block are mapped to physical pages in a second physical block with the rearranged mapping order.


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