The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2020

Filed:

Oct. 26, 2017
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Prasad Chalasani, San Jose, CA (US);

Venkata N. S. N. Rao, Fremont, CA (US);

Majid Jalali Far, San Jose, CA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 29/06 (2006.01); H03F 3/45 (2006.01); H04L 25/02 (2006.01);
U.S. Cl.
CPC ...
H04L 69/18 (2013.01); H03F 3/45183 (2013.01); H03F 3/45219 (2013.01); H04L 25/0272 (2013.01); H03F 2203/45074 (2013.01); H03F 2203/45081 (2013.01);
Abstract

A multi-protocol receiver for receiving at least one input signal comprises: a comparator, a protection controller, and a multi-stage current mode logic ('CML') buffer. The comparator compares a reference voltage and a predefined voltage. At least one output of the comparator is coupled to at least one input of the protection controller. The multi-stage current mode logic buffer receives the input signal and the reference voltage. Outputs of the protection controller are coupled to control inputs of the multi-stage CML buffer for operating the multi-stage CML buffer to process the input signal and the reference signal.


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