Semiconductor memory device

Abstract

A semiconductor memory device according to an embodiment includes a substrate; a plate-like first conductivity layer provided above the substrate and extending parallel to a substrate plane to bestride first and second regions; a plate-like second conductivity layer provided above the first conductivity layer to be separated from the first conductivity layer, an end portion of the first conductivity layer has a protruding staircase shape in the first region, the second conductivity layer extending parallel to the first conductivity layer to bestride the first and second regions; a first contact connected to the first conductivity layer at a side surface or a bottom surface of the first conductivity layer and extending from the first conductivity layer toward the substrate, the first contact being connected at a position where the end portion of the first conductivity layer in the first region protrudes, and a diameter size of a portion of the first contact connected at a side surface or a bottom surface of the first conductivity layer having a maximum diameter size; a second contact connected to the second conductivity layer at a side surface or a bottom surface of the second conductivity layer in the first region and extending from the second conductivity layer toward the substrate to penetrate the first conductivity layer, a diameter size of a portion of the second contact connected at a side surface or a bottom surface of the second conductivity layer having a maximum diameter size; a channel body penetrating the first and second conductivity layers in the second region; and a memory film including a charge accumulation portion provided between the first and second conductivity layers and the channel body in the second region.