The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2020

Filed:

May. 23, 2018
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Heimanu Niebojewski, Cohoes, NY (US);

Ruilong Xie, Schenectady, NY (US);

Andrew M. Greene, Slingerlands, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Caymen, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28132 (2013.01); H01L 21/28088 (2013.01); H01L 21/28114 (2013.01); H01L 29/0653 (2013.01); H01L 29/42372 (2013.01); H01L 29/4966 (2013.01); H01L 29/6653 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

A method of manufacturing a semiconductor device includes forming a composite spacer architecture over sidewalls of a sacrificial gate disposed over a semiconductor layer, and the subsequent deposition of a supplemental sacrificial gate over the sacrificial gate. A recess etch of the composite spacer architecture is followed by the formation within the recess of a sacrificial capping layer. The supplemental sacrificial gate and the sacrificial gate are removed to expose the composite spacer architecture, which is selectively etched to form a T-shaped cavity overlying a channel region of the semiconductor layer. A replacement metal gate is formed within a lower region of the T-shaped cavity, and a self-aligned contact (SAC) capping layer is formed within an upper region of the T-shaped cavity prior to metallization of the device.


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