The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2020

Filed:

Dec. 12, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Kiyotake Sakurai, Hino, JP;

Takuya Nakanishi, Hino, JP;

Shinji Bessho, Hachioji, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/406 (2006.01); G11C 11/409 (2006.01); G11C 11/4091 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40618 (2013.01); G11C 11/4091 (2013.01); G11C 11/40626 (2013.01);
Abstract

Embodiments of the disclosure are drawn to apparatuses and methods for generating a refresh address locally at a memory bank. The memory bank may include or be associated with a bank logic circuit that latches an initial refresh address from a global row address bus for a first pump of a refresh operation. The bank logic circuit then updates the latched refresh address received to generate a new refresh address for a second pump of the refresh operation. A memory device may include multiple memory banks that share the global row address bus.


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