The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2020

Filed:

Aug. 29, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Kishore Kasichainula, Phoenix, AZ (US);

Satheesh Chellappan, Folsom, CA (US);

Lay Chen Ong, George Town, MY;

Harish G. Kamat, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3185 (2006.01); G01R 31/317 (2006.01); G01R 31/319 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318558 (2013.01); G01R 31/31701 (2013.01); G01R 31/31723 (2013.01); G01R 31/31908 (2013.01); G01R 31/318536 (2013.01); G01R 31/318555 (2013.01);
Abstract

Technology for bypass testing of an integrated circuit using a testing device. The testing device comprising a port configured to connect to an integrated circuit before the integrated circuit is packaged into an end product. The testing device further comprising a controller with architecture configured to bypass a training process designed to be initiated when the integrated circuit is first connected to the port and the port is powered on, confirm a connection between the integrated circuit and the testing device, send a test pattern to the integrated circuit to execute; and receive results from the integrated circuit executing the test pattern.


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