The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2020

Filed:

Jul. 30, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Raghukiran Sreeramaneni, McKinney, TX (US);

Daniel B. Penney, Wylie, TX (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01); G11C 7/10 (2006.01); H04L 25/49 (2006.01); G11C 7/02 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03057 (2013.01); G11C 7/02 (2013.01); G11C 7/1006 (2013.01); G11C 7/1063 (2013.01); G11C 11/4096 (2013.01); H04L 25/4917 (2013.01); G11C 2207/107 (2013.01);
Abstract

A device includes a voltage generator that generates a reference signal, a multi-level bias generator coupled to the voltage generator to receive the reference signal and generate a plurality of bias level signals based at least in part on the reference signal. The multi-level bias generator transmits the plurality of bias level signals to a plurality of multiplexers that each receive a select signal to select a subset of bias level signals of the plurality of bias level signals. The device also includes an adjustment circuit of a decision feedback equalizer that receives a respective selected subset of bias level signals from one multiplexer of the plurality of multiplexers and utilizes the respective selected subset of bias level signals to compensate for inter-symbol interference of a bit due to a previously received bit of a bit stream.


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