The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2020

Filed:

Sep. 11, 2017
Applicant:

Hiroshi Watanabe, Kanagawa-ken, JP;

Inventors:

Hiroshi Watanabe, Kanagawa-ken, JP;

Te-Chang Tseng, Zhubei, TW;

Yukihiro Nagai, Hokkaido, JP;

Riichiro Shirota, Kanagawa-ken, JP;

Assignee:

Other;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 9/08 (2006.01); G06Q 20/38 (2012.01); G06F 7/58 (2006.01); H04L 9/32 (2006.01); G06Q 20/36 (2012.01); G06F 21/60 (2013.01); G06F 21/73 (2013.01); G06F 21/44 (2013.01);
U.S. Cl.
CPC ...
H04L 9/0866 (2013.01); G06F 7/588 (2013.01); G06F 21/602 (2013.01); G06F 21/73 (2013.01); G06Q 20/363 (2013.01); G06Q 20/3823 (2013.01); G06Q 20/3825 (2013.01); G06Q 20/3827 (2013.01); G06Q 20/3829 (2013.01); H04L 9/32 (2013.01); H04L 9/3236 (2013.01); H04L 9/3278 (2013.01); G06F 21/44 (2013.01); H04L 2209/38 (2013.01); H04L 2209/805 (2013.01);
Abstract

A network includes a logical network and a physical network. The logical network includes a plurality of logical nodes. Each logical node is connected to a respective identification core. Each identification core includes at least one semiconductor chip having a physical randomness. Each semiconductor chip generates one of a plurality of pairs of private keys and public keys based on the physical randomness thereof according to an input received by the one of the at least one semiconductor chip under a public key cryptography. One of the public keys is regarded as a logical address of one of the logical nodes, which is connected to one of the identification cores. The physical network includes a plurality of physical nodes. Each identification core is one of components in each physical node. The logical network is uniquely linked to the physical network by the pairs of private keys and public keys.


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