The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2020

Filed:

Oct. 18, 2018
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventor:

Atsushi Yamada, Hiratsuka, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/207 (2006.01); H01L 29/43 (2006.01); H01L 29/20 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7787 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02458 (2013.01); H01L 21/02505 (2013.01); H01L 29/207 (2013.01); H01L 29/432 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01); H01L 29/0843 (2013.01); H01L 29/2003 (2013.01); H01L 29/41766 (2013.01);
Abstract

A semiconductor device includes a substrate, a channel layer containing GaN formed above the substrate, a barrier layer containing InAlGaN (0.00≤x1≤0.20, 0.60≤y1≤1.00) formed above the channel layer, an intermediate layer containing InAlGaN (0.00≤x2≤0.04, 0.30≤y2≤0.60) formed on the barrier layer, and a cap layer containing GaN formed on the intermediate layer.


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