The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2020

Filed:

Nov. 26, 2019
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

Chuen-Der Lien, San Jose, CA (US);

Chi-Shun Lin, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/26 (2006.01); G06F 11/10 (2006.01); G11C 29/00 (2006.01); G11C 29/42 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G06F 11/1068 (2013.01); G11C 29/00 (2013.01); G11C 29/42 (2013.01);
Abstract

The disclosure provides a memory device including: a connection interface; a memory array associated with a parameter; and a memory control circuit configured at least to: receive operations, each of the operations being a read operation or a write operation, through the connection interface to perform the operations on the memory array; detect, based on performing the operations on the memory array, a read error which is either a binary 0 read error or a binary 1 read error; update the error counter by incrementing an counter value of the error counter in response to the read error being the binary 1 read error and decreasing the counter value in response to the read error being the binary 0 read error; and adjust the parameter in response to the counter value having reached a positive predetermined threshold or a negative predetermined threshold.


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