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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10783313 B1

PDFFull Text
Date of Patent:
Sep. 22, 2020

Filed:

Aug. 23, 2019

Method for improved cut metal patterning

Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Kuang-Ching Chang, Hsinchu, TW;

Ting-Wei Chiang, New Taipei, TW;

Hui-Zhong Zhuang, Kaohsiung, TW;

Jung-Chan Yang, Longtan Township, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;

Attorney:

Hauptman Ham, LLP

Primary Examiner:

Phallaka Kik

Int. Cl.
CPC ...
G06F 17/50 (2006.01); H01L 25/00 (2006.01); H03K 19/00 (2006.01); H03K 17/00 (2006.01); G06F 30/398 (2020.01); G06F 111/04 (2020.01); G06F 30/347 (2020.01); H03K 19/018 (2006.01); G06F 30/3947 (2020.01); H03K 19/0175 (2006.01); H03K 19/0185 (2006.01); H03K 17/687 (2006.01); G06F 30/3953 (2020.01); H03K 19/17736 (2020.01); G06F 30/392 (2020.01);
U.S. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 30/347 (2020.01); G06F 30/392 (2020.01); G06F 30/3947 (2020.01); G06F 30/3953 (2020.01); G06F 2111/04 (2020.01); H01L 25/00 (2013.01); H03K 17/687 (2013.01); H03K 19/0175 (2013.01); H03K 19/01825 (2013.01); H03K 19/017545 (2013.01); H03K 19/018557 (2013.01); H03K 19/17736 (2013.01);
Abstract

A method of preparing an integrated circuit device design including analyzing a preliminary device layout to identify a vertical abutment between a first cell and a second cell, the locations of, and spacing between, internal metal cuts within the first and second cells, indexing the second cell relative to the first cell by N CPP to define one or more intermediate device layouts to define a modified device layout with improved internal metal cut spacing in order to suppress BGE and LE.

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