The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2020
Filed:
Dec. 13, 2018
Cadence Design Systems, Inc., San Jose, CA (US);
Sushobhit Singh, Noida, IN;
Naresh Kumar, Greater Noida, IN;
Beenish, Noida, IN;
Ankur Gulati, Haryana, IN;
Vishal Karda, Greater Noida, IN;
Shashank Prasad, Noida, IN;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
The present disclosure relates to a system for performing static timing analysis in an electronic design. Embodiments may include providing, using at least one processor, an electronic design and extracting hierarchical crossing path exception information from a hierarchical design view associated with the electronic design. Embodiments may further include transferring the hierarchical crossing path exception information to a block view associated with the electronic design and extracting a timing model based upon, at least in part, the hierarchical crossing path exception information. Embodiments may also include implementing the timing model at a top-level view associated with the electronic design.