The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2020

Filed:

Jul. 03, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Daniel J. Ragland, Sherwood, OR (US);

Guy M. Therien, Beaverton, OR (US);

Kirk Pfaender, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/78 (2006.01); G06F 1/18 (2006.01); G06F 1/3206 (2019.01); G06F 1/3234 (2019.01); G06F 1/3296 (2019.01); G06F 1/26 (2006.01); G06F 9/4401 (2018.01);
U.S. Cl.
CPC ...
G06F 15/7807 (2013.01); G06F 1/189 (2013.01); G06F 1/3206 (2013.01); G06F 1/3243 (2013.01); G06F 1/3296 (2013.01); G06F 1/26 (2013.01); G06F 1/266 (2013.01); G06F 9/4403 (2013.01); G06F 9/4405 (2013.01); Y02D 10/152 (2018.01); Y02D 10/172 (2018.01);
Abstract

Apparatuses, methods and storage medium for providing access from outside a multicore processor System on Chip (SoC) are disclosed herein. In embodiments, an SoC may include a memory to store a plurality of embedded values correspondingly associated with a plurality of architecturally identical cores. Each embedded value may indicate a default voltage for a respective one of the plurality of architecturally identical cores. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to provide access from outside the multicore processor SoC to individually configure voltages of the plurality of architecturally identical cores to values that are different than the values of the default voltages. Other embodiments may be described and/or claimed.


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