The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2020
Filed:
Mar. 13, 2019
Globalfoundries Inc., Grand Cayman, KY;
Juhan Kim, Santa Clara, CA (US);
GLOBALFOUNDRIES Inc., Grand Cayman, KY;
Abstract
One illustrative integrated circuit product disclosed herein comprises a PFET region and an NFET region defined in an active semiconductor layer of an SOI substrate, a deep N-well region positioned in the base semiconductor substrate, first and second isolated P-wells positioned in the base semiconductor substrate below the PFET region and the NFET region, respectively, wherein the first and second isolated P-wells engage the deep N-well region, and a deep isolation structure that extends into the deep N-well region, wherein a first portion of the deep isolation structure is laterally positioned between the first isolated P-well and the second isolated P-well to electrically isolate, in a horizontal direction, the first isolated P-well from the second isolated P-well. The product also includes at least one PFET transistor and at least one NFET transistor.