The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2020

Filed:

May. 15, 2019
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Mahim Gupta, San Jose, CA (US);

Rohit Sehgal, San Jose, CA (US);

Rohan Dhekane, San Jose, CA (US);

Niles Yang, San Jose, CA (US);

Aaron Lee, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/06 (2006.01); G11C 16/34 (2006.01); G11C 29/00 (2006.01); G11C 29/24 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G11C 16/349 (2013.01); G11C 29/24 (2013.01); G11C 29/44 (2013.01); G11C 29/76 (2013.01);
Abstract

Detecting a faulty memory block. Various methods include: performing a read operation on a memory block of the memory array, the read operation generates a failed bit count; determining the failed bit count in above a value associated with an overall failed bit count; determining the failed bit count is above a threshold value; in response, performing a confirmation process on the memory block, the confirmation process defining a number of consecutive erase cycles and a level of an erase cycle, the confirmation process results in erase pass or erase fail; and marking the memory block for garbage collection in response to determining the confirmation process results in erase fail. Methods additionally include setting the level of the erase cycle by modifying at least one selected form the group comprising: an erase voltage parameter; an erase verify parameter; and a number of bits ignored during the erase cycle.


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