The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2020
Filed:
Jan. 11, 2018
Applicant:
Siliconware Precision Industries Co., Ltd., Taichung, TW;
Inventors:
Jin-Wei You, Taichung, TW;
Chun-Lung Chen, Taichung, TW;
Assignee:
Siliconware Precision Industries Co., Ltd., Taichung, TW;
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 3/46 (2006.01); H05K 3/00 (2006.01); H05K 3/18 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0271 (2013.01); H05K 3/007 (2013.01); H05K 3/4682 (2013.01); H05K 3/184 (2013.01); H05K 2201/0187 (2013.01); H05K 2201/096 (2013.01); H05K 2203/0147 (2013.01); H05K 2203/0156 (2013.01); H05K 2203/0165 (2013.01); H05K 2203/0709 (2013.01); Y10T 29/49155 (2015.01);
Abstract
A method for fabricating a substrate structure is provided, which includes the steps of: disposing at least a strengthening member on a carrier; sequentially forming a first circuit layer and a dielectric layer on the carrier, wherein the strengthening member is embedded in the dielectric layer; forming a second circuit layer on the dielectric layer; removing the carrier; and forming an insulating layer on the first circuit layer and the second circuit layer. The strengthening member facilitates to reduce thermal warping of the substrate structure.