The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2020
Filed:
Feb. 25, 2019
Applicant:
Fuji Electric Co., Ltd., Kawasaki-shi, JP;
Inventors:
Yusuke Kobayashi, Tsukuba, JP;
Naoyuki Ohse, Matsumoto, JP;
Assignee:
FUJI ELECTRIC CO., LTD., Kawasaki, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/47 (2006.01); H01L 29/808 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 29/1608 (2013.01); H01L 29/47 (2013.01); H01L 29/66666 (2013.01); H01L 29/66734 (2013.01); H01L 29/7806 (2013.01); H01L 29/8083 (2013.01);
Abstract
A first p-type region in contact with a bottom of a gate trench is disposed in a striped shape extending along a first direction that is orthogonal to a second direction along which the gate trench extends in a striped shape, as viewed from a front surface of a silicon carbide substrate. As a result, trench gate MOSFETs are disposed in parallel at a predetermined cell pitch along the first direction. A flat SBD is disposed at a predetermined cell pitch along the second direction. The cell pitch of the trench gate MOSFET and the cell pitch of the flat SBD may be set independently of each other.