The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2020

Filed:

Sep. 05, 2017
Applicant:

Toshiba Memory Corporation, Minato-ku, Tokyo, JP;

Inventors:

Soichi Yamazaki, Yokkaichi Mie, JP;

Kazuhito Furumoto, Yokkaichi Mie, JP;

Kosuke Horibe, Yokkaichi Mie, JP;

Keisuke Kikutani, Yokkaichi Mie, JP;

Atsuko Sakata, Yokkaichi Mie, JP;

Junichi Wada, Yokkaichi Mie, JP;

Toshiyuki Sasaki, Yokkaichi Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/3213 (2006.01); H01L 21/033 (2006.01); H01L 27/11582 (2017.01); H01L 27/1157 (2017.01);
U.S. Cl.
CPC ...
H01L 21/31144 (2013.01); H01L 21/0332 (2013.01); H01L 21/31116 (2013.01); H01L 21/32136 (2013.01); H01L 21/32139 (2013.01); H01L 27/1157 (2013.01); H01L 27/11582 (2013.01);
Abstract

A method of manufacturing a semiconductor device includes forming a mask layer including aluminum or an aluminum compound on a layer to be etched comprising at least one first metal selected from tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium, and iridium. The method of manufacturing a semiconductor device further includes patterning the mask layer, and etching the layer to be etched by using the patterned mask layer to form a hole or a groove in the layer to be etched.


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