The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2020
Filed:
Dec. 28, 2017
Intel Corporation, Santa Clara, CA (US);
Rajesh Poornachandran, Portland, OR (US);
Nagasubramanian Gurumoorthy, Portland, OR (US);
Vincent Zimmer, Federal Way, WA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An apparatus to implement functional safety control logic (FSCL) in an autonomous driving system comprises a field-programmable gate array (FPGA) comprising logic elements to be partitioned into a first section to implement one or more safety cores and a second section to implement one or more non-safety cores, a memory to couple to the safety core or to the non-safety core, and a trusted execution environment (TEE) to couple to a remote administrator via a network and to apply a configuration received from the remote administrator to the FPGA. The safety core is to function as an active agent for FSCL during operation, and the non-safety core is to function as a failover agent during operation, and wherein the non-safety core is to perform a liveliness check on the safety core to monitor for a failover and to take over as the active agent in the event of a failover.