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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10756079 B1

PDFFull Text
Date of Patent:
Aug. 25, 2020

Filed:

Aug. 07, 2017

Methods for forming integrated circuit having guard rings

Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Ming-Song Sheu, Hsinchu, TW;

Jian-Hsing Lee, Hsinchu, TW;

Yu-Chang Jong, Hsinchu, TW;

Chun-Chien Tsai, Yongkang, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;

Attorney:

Hauptman Ham, LLP

Primary Examiner:

Daniel Whalen

Int. Cl.
CPC ...
H01L 29/02 (2006.01); H01L 27/02 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0251 (2013.01); H01L 29/0619 (2013.01); H01L 29/0623 (2013.01); H01L 29/1083 (2013.01); H01L 29/66681 (2013.01); H01L 29/7817 (2013.01); H01L 29/7835 (2013.01); H01L 29/0653 (2013.01); H01L 29/0692 (2013.01); H01L 29/1045 (2013.01);
Abstract

A method for forming an integrated circuit includes forming a first guard ring around at least one transistor over a substrate. The method further includes forming a second guard ring around the first guard ring. The method further includes forming a first doped region adjacent to the first guard ring, the first doped region having a first dopant type. The method further includes forming a second doped region adjacent to the second guard ring, the second doped region having a second dopant type.

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Quick Actions:

Sheu, Ming-Song. (2020). Methods for forming integrated circuit having guard rings (U.S. Patent No. 10756079). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10756079

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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