The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2020
Filed:
Mar. 28, 2019
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Adel A. Elsherbini, Chandler, AZ (US);
Javier A. Falcon, Chandler, AZ (US);
David J. Michalak, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 25/00 (2006.01); H01L 39/04 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); G06N 10/00 (2019.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); G06N 10/00 (2019.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 39/045 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06537 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06582 (2013.01); H01L 2225/06589 (2013.01);
Abstract
Quantum computing assemblies with through-hole dies, and related devices and methods, are disclosed herein. For example, in some embodiments, a quantum computing assembly may include a package substrate, a quantum processing die, and a through-hole die between the package substrate and the quantum processing die, wherein the quantum processing die is electrically coupled to the package substrate by interconnects extending through through-holes of the through-hole die.