The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

Sep. 17, 2018
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;

Inventors:

Ha Yong Jung, Suwon-Si, KR;

Jae Kul Lee, Suwon-Si, KR;

Ji Hye Shim, Suwon-Si, KR;

Han Sang Cho, Suwon-Si, KR;

Woon Ha Choi, Suwon-Si, KR;

Jae Min Choi, Suwon-Si, KR;

Dong Jin Kim, Suwon-Si, KR;

Sung Taek Woo, Suwon-Si, KR;

Assignee:

SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/522 (2006.01); H01L 23/498 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3114 (2013.01); H01L 23/481 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 23/522 (2013.01); H01L 24/02 (2013.01); H01L 27/14618 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/18 (2013.01); H01L 2924/14 (2013.01); H01L 2924/15311 (2013.01);
Abstract

A fan-out sensor package includes: a redistribution portion having a through-hole and including a wiring layer and vias; a first semiconductor chip having an active surface having a sensing region of which at least a portion is exposed through the through-hole and first connection pads disposed in the vicinity of the sensing region; a second semiconductor chip disposed side by side with the first semiconductor chip in a horizontal direction and having second connection pads; dam members disposed in the vicinity of the first connection pads; an encapsulant encapsulating the redistribution portion, the first semiconductor chip, and the second semiconductor chip; and electrical connection structures electrically connecting the first connection pads and the second connection pads to the wiring layer or the vias of the redistribution portion.


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